The present invention relates to a method for manufacturing a thin film transistor, and particularly to a method for manufacturing a thin film transistor which is applicable to a SRAM (static random access memory) and liquid crystal display device.
In the conventional method for manufacturing a thin film transistor, a bottom gate and a top gate are used. And polysilicone for forming a body layer is manufactured by enlarging the particle size using solid phase growing method. The solid phase growing method for the body polysilicone layer according to the conventional method is carried out by heat treating at about 600.degree. C. for about 24 hours.
Recently, an attempt to increase the crystallization degree by RTA (rapid thermal annealing) is made. However, this increases production cost and is difficult to proceed in batch type.
A plasma H.sub.2 passivation used to be applied to obtain on/off current ratio (I.sub.on /I.sub.off) of 10.sup.6 or above.
The conventional method for manufacturing the thin film transistor will be described below referring to the attached FIG. 1.
First, a gate electrode 2 is formed by depositing conductive material such as polysilicone on an insulating layer 1 formed on a substrate (not shown) and patterning thereof through a photolithography as shown in FIG. 1A.
After then, a gate oxide 3 and a body polysilicone layer 4 are sequentially formed by CVD (chemical vapor deposition) on the whole surface of the insulating layer 1 in which the gate electrode 2 is formed, and channel ions are implanted.
As shown in FIG. 1B, photoresist 5 is coated on the body polysilicone layer 4 and is selectively exposed and developed to form a prescribed photoresist pattern to define a channel region and an offset region on the body polysilicone layer 4. At this time, the region covered with the photoresist 5 becomes the channel region and the offset region. Ion implantation is carried out to form an LDD (light doped drain) region 11 using the photoresist pattern 5 defining the channel region and the offset region as an ion implantation mask.
The photoresist pattern 5 defining the channel region and the offset region is removed and then photoresist 6 is coated again, selectively exposed and developed to form a photoresist pattern 6 defining a source region and a drain region. Ion implantation is carried out using this photoresist pattern 6 as a mask to form the source region and the drain region 12 to complete the manufacture of the thin film transistor as shown in FIG. 1C.
FIG. 2 is a schematic cross-sectional view of the channel region formed on the body polysilicone layer 4 of the thin film transistor manufactured by the conventional method.
According to the conventional method, a problem of leakage current generation by the grain boundary A which passes through the source S and the drain D as shown in FIG. 2 occurs.
Moreover, since the offset region and the source and the drain region are defined using the photoresist, the lengths of the channel region and the offset region are changed according to the degree of the overlay misalign, and stable device characteristic could be hardly obtained.